142427562

Nā huahana

R5F100GEAFB#10

ʻO ka wehewehe pōkole:

ʻenehana hoʻohana mana loa-haʻahaʻa
· VDD = hoʻokahi mana lako uila o 1.6 a 5.5 V
· ʻano HALT
· ʻO ke ʻano STOP
· SNOOZE mode
RL78 CPU kumu
· ʻO ka hoʻolālā CISC me 3-pae pipeline


Huahana Huahana

Huahana Huahana

Nā hiʻohiʻona

ʻenehana hoʻohana mana loa-haʻahaʻa
VDD = hoʻokahi mana lako uila o 1.6 a 5.5 V
ʻO ke ʻano HALT
ʻO ke ʻano STOP
ʻO ke ʻano SNOOZE
RL78 CPU kumu
ʻO ka hoʻolālā CISC me ka pipeline 3-pae
Ka manawa hoʻokō aʻo liʻiliʻi: Hiki ke hoʻololi
mai ka wikiwiki kiʻekiʻe (0.03125 μs: @ 32 MHz hana
me ka oscillator on-chip kiʻekiʻe) i ka wikiwiki haʻahaʻa loa
(30.5 μs: @ 32.768 kHz hana me ka subsystem
uaki)
Wahi helu wahi: 1 MB
Nā papa inoa kumu nui: (8-bit register × 8) × 4
nā panakō
Ma luna o ka puʻupuʻu RAM: 2 a 32 KB
Hoʻomanaʻo flash code
Hoʻomanaʻo flash code: 16 a 512 KB
Nui poloka: 1 KB
Ka pāpā ʻana i ka holoi ʻana a me ke kākau hou ʻana (security
hana)
Hana debug ma-chip
Hoʻolālā ponoʻī (me ka hana boot swap / pale uila
hana pukaaniani)

ʻIkepili Flash Memory

Hoʻomanaʻo uila ʻikepili: 4 KB a i 8 KB
Back ground operation (BGO): Hiki ke kuhikuhi
hoʻokō ʻia mai ka hoʻomanaʻo papahana ʻoiai ke kākau hou ʻana i ka
ʻikepili flash memory.
Ka helu o nā kākau hou ʻana: 1,000,000 manawa (TYP.)
Voltage o ke kākau hou ʻana: VDD = 1.8 a 5.5 V
Kiʻekiʻe-māmā ma-chip oscillator
E koho mai 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz,
6 MHz, 4 MHz, 3 MHz, 2 MHz, a me 1 MHz
Pololei kiʻekiʻe: +/- 1.0 % (VDD = 1.8 a 5.5 V, TA = -20
i +85°C)

ʻO ka mahana ambient hana

TA = -40 a +85°C (A: Nā noi mea kūʻai, D:
Nā noi ʻoihana)
TA = -40 a +105°C (G: Nā noi ʻoihana)
Hooponopono mana a me ka hana hou
Kaapuni mana-on-reset (POR).
ʻO ka ʻike uila uila (LVD) (E koho i ka interrupt a
reset mai 14 pae)
DMA (Direct Memory Access) mea hoʻoponopono · 2/4 awāwa · Ka helu o nā wati i ka wā o ka hoʻoili ʻana ma waena o 8/16-bit SFR a me RAM i loko: 2 mau wati Mea hoʻonui a me divider/multiply-accumulator · 16 bits × 16 bits = 32 bits (Unsigned or pūlima) · 32 bit ÷ 32 bits = 32 bits (Unsigned) · 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed) Serial interface · CSI: 2 to 8 channels · UART/UART (LIN-bus supported) : 2 a 4 mau ala · I2C/Simplified I2C kamaʻilio: 3 a 10 awāwa Timer · 16-bit manawa: 8 a 16 mau kaha · 12-bit manawa manawa: 1 channel · Real-time clock: 1 channel (kalendar no 99 makahiki, ʻO ka hana hoʻāla, a me ka hana hoʻoponopono ʻana i ka uaki. Hoʻokomo analog: 6 a hiki i 26 kaha · Voli uila kuhikuhi kūloko (1.45 V) a me ka ʻike wela Nānā 1 awa I/O · awa I/O: 16 a i 120 (N-ch open drain I/O [kū i ka volta o 6 V]: 0 a 4, N-ch open drain I/O [VDD withstand voltage Note 2/EVDD withstand voltage Note 3]: 5 to 25) · Hiki ke hoʻonohonoho ʻia i ka N-ch open drain, TTL input buffer, a me ka huki huki ʻana ma luna o ka chip · ʻOkoʻa ka pilina : Hiki ke hoʻohui i kahi mea hana 1.8/2.5/3 V · Hana hoʻopau kī ma-chip · Hoʻopuka ʻana i ka uaki / buzzer mea hoʻoponopono ʻē aʻe ʻē aʻe · BCD ma ka chip (binary-coded decimal) kaapuni hoʻoponopono Nā memo 1. Hiki ke koho wale ʻia. ma HS (kiʻekiʻe-wikiwiki nui) mode 2. Nā huahana me 20 a 52 pine 3. Nā huahana me 64 a 128 mau pine


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